The present invention relates to a sum/differential signal processing circuit for use in a surround processor such as a Dolby surround processing system.
Surround processors, such as Dolby surround processing systems, are generally required to produce signals representing the sum of and the difference between left and right stereophonic signals. Therefore, sound reproduction systems, such as these surround processors, include a sum/differential signal processing circuit for producing left and right signals. When a monaural signal is reproduced from an AM broadcasting program or a monaural VTR, the monaural signal would be cancelled if it passed through a difference detector. Thus, it is necessary to switch between differential and sum signal processing modes dependent on an input signal applied.
It would be conceivable to provide a sum/differential signal switching circuit as shown in FIG. 2, in which operational amplifiers IC.sub.1 and IC.sub.2 generate signals V1=A-B and V2=A+B independently of each other. Either one of these signals is selected by a transfer switch SW' so that an output voltage V0 may be either V0=V1 or V0=V2.
The transfer switch SW' is one of the two-contact switching type. Where the transfer switch SW' is constructed of bipolar transistors, as shown in FIG. 3, a control voltage signal is applied directly to the base of one transistor TR.sub.2 and via an inverter to the base of the other transistor TR.sub.1 for allowing input signals applied to the emitters of the transistors TR.sub.1 and TR.sub.2 to be selectively picked up as an output signal from the collectors thereof. Therefore, the transfer switch requires two transistors, and the inverter is further required to invert the control voltage signal. The transfer switch of FIG. 3 is thus complex in arrangement.